1. Field of the Invention
The present invention relates to the polishing of silicon wafers, semiconductor wafers, and integrated circuit wafers, and more particularly to an improved polishing pad and a method for disengaging a microelectronic substrate such as a silicon wafer and a semiconductor wafer from a polishing pad.
2. Description of Related Art
In the manufacture of integrated circuit and semiconductor devices fine polishing is used to provide a planarized surface, which is necessary to obtain before the addition of another layer of material. For instance without fine polishing, metallization layers (formed to provide interconnects between various devices) tend to create nonuniform surfaces, and these surface nonuniformities may interfere with the optical resolution of subsequent lithographic steps, thereby leading to difficulty with printing high resolution patterns. The surface nonuniformities may also interfere with step coverage of subsequently deposited metal layers and possibly cause open or shorted circuits.
Various techniques have been developed to planarize one or more layers of a semiconductor device. One such approach involves polishing a layer with a polishing slurry that includes abrasive particles mixed in an aqueous medium. Typically with this approach: i. a wafer is mounted in a wafer holder; ii. a polishing pad's polishing surface is substantially saturated with an appropriate slurry, iii. the pad and the wafer are moved relative to one another such that the wafer provides a planer motion with respect to the pad, and iv. the polishing surface of the pad and the substrate to be polished are biased toward one another. Ideally, the polishing operation erodes surface protrusions ("peaks") to a much greater extent than surface indentations ("valleys"), and the process continues until the substrate is largely flattened. In one embodiment, slurry is introduced near the center of the pad, then forms a ring on top of the substrate and then the slurry exits the process as new slurry is introduced. It is generally desirable to maintain an adequate amount of slurry between the wafer and the pad, while dispensing as little slurry as possible to lower costs.
The polishing pads used in semiconductor device and/or memory disk manufacture will be referred to in this specification as "chemical mechanical polishing" or "CMP" pads, because they provide polishing by means of chemical and mechanical interaction (as opposed to micros-grinding). CMP pads will generally have a texture which allows slurry to move within the polishing interface. CMP polishing pads with various topographies that improve the polishing operation are known in the art.
Generally speaking, prior to disengaging a substrate from a CMP polishing pad, the contact region between slurry and substrate is substantial, owing to: i. the reservoir of slurry retained in the CMP pad void pattern, and ii. the likelihood that an area of the pad surface defines an enclosed void having no portion open to the atmosphere to break a vacuum created during the disengaging of the pad from the substrate. The resulting cohesive force due to surface tension of the fluid can be substantial and can give rise to problems during disengagement of the pad and the substrate.
In the electronic's industry, typical substrate-holding devices employ a vacuum in a chuck assembly, and this device is generally used to retain the substrate during polishing. A recurring problem can be encountered when disengaging a vacuum-held substrate from the polishing pad. The cohesive force within the slurry from contact of the slurry with a substantial portion or entire surface of the substrate can exceed the force provided by the vacuum retaining means on the chuck. The substrate can be dislodged from the chuck upon attempting disengagement with the pad, leading to risk of damage to the substrate. Accordingly, a need exists for a polishing pad that provides reduced cohesive force from contact of the slurry during wafer disengagement, and a method is needed for disengaging a substrate from a CMP polishing pad which provides a limited cohesive force opposing the wafer-holding means at the location where the wafer and pad are disengaged.
One solution to the disengagement problem is shown in U.S. Pat. No. 5,658,190 and No. 5,882,248 wherein, at the outer edge of a circular pad, the edge of the substrate wafer is forced up an incline so that the vacuum underneath the wafer is broken. This method is not desirable because the wafer and its carrier are forced out of the parallel position with regard to the pad.
It is known that such very high cohesive force between a wafer and a grooved polishing pad are not encountered. Grooved pads described in European Patent Application No. EP 0 806 267 A1 state that "The plurality of grooves in the polishing pad surface also result in a minimal surface tension build up between the polishing pad and the substrate to facilitate separation between the two." U.S. Pat. No. 5,842,910 describes polishing pads with non-concentric grooves and states that such pads "eliminates a phenomena called `wafer stickage` where cohesive forces between the face of the wafer and the actual smooth polishing pad form a suction. When suction is created it is very difficult to pull the wafer off the face. So by having grooved rings it provides a release so that the wafer can actully lift back off the polishing surface.
It would be most advantageous to have a polishing pad which is uniformly flat over the surface used for polishing, but wherein a portion of the surface which is not used for polishing is available for use when it is necessary to disengage the wafer from the pad.